This Standard has been cancelled and replaced by ECSS-Q-ST-60-02C (31 July 2008).
Scope
This Standard defines a comprehensive set of requirements for the user development of digital, analog and mixed analog-digital custom designed integrated circuits, such as application specific integrated circuits (ASICs) and field programmable gate arrays (FPGAs). The user development includes all activities beginning with setting initial requirements and ending with the validation and release of prototype devices.
This Standard is aimed at ensuring that the custom designed components used in space projects meet their requirements in terms of functionality, quality, reliability, schedule and cost. The support of appropriate planning and risk management is essential to ensure that each stage of the development activity is consolidated before starting the subsequent one and to minimize or avoid additional iterations. For the development of standard devices, such as application specific standard products (ASSPs) and IP cores, and devices which implement safety related applications, additional requirements can be included which are not in the scope of this document.
The principal sections of this Standard correspond to the main concurrent activities of a circuit development programme. These include:
- ASIC and FPGA programme management,
- ASIC and FPGA engineering,
- ASIC and FPGA quality assurance.
The provisions of this document apply to all actors involved in all levels in the realization of space segment hardware and its interfaces.
When viewed in a specific project context, the requirements defined in this Standard should be tailored to match the genuine requirements of a particular profile and circumstances of a project.
NOTE Tailoring is a process by which individual requirements or specifications, standards and related documents are evaluated and made applicable to a specific project. This process can result in deletion, addition or modification of requirements.
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