This Standard defines a comprehensive set of requirements for the user development of digital, analog and mixed analog-digital custom designed integrated circuits, such as application specific integrated circuits (ASICs) and field programmable gate arrays (FPGAs). The user development includes all activities beginning with setting initial requirements and ending with the validation and release of prototype devices.
This Standard is aimed at ensuring that the custom designed components used in space projects meet their requirements in terms of functionality, quality, reliability, schedule and cost. The support of appropriate planning and risk management is essential to ensure that each stage of the development activity is consolidated before starting the subsequent one and to minimize or avoid additional iterations. For the development of standard devices, such as application specific standard products (ASSPs) and IP cores, and devices which implement safety related applications, additional requirements can be included which are not in the scope of this document.
The principal clauses of this Standard correspond to the main concurrent activities of a circuit development programme. These include:
- ASIC and FPGA programme management,
- ASIC and FPGA engineering,
- ASIC and FPGA quality assurance.
The provisions of this document apply to all actors involved in all levels in the realization of space segment hardware and its interfaces.
This standard may be tailored for the specific characteristics and constraints of a space project, in accordance with ECSS‐S‐ST‐00.
Md5 checksum .doc file = 3FF7DBD82219632C97C7C00333D099BE
Md5 checksum .pdf file = 1153285443A95A0658152CBE4BADCF02
This standard cancels and replaces ECSS-Q-60-02A (17 July 2007).